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Industry’s First PCIe® 3.1-Compliant Root Port Controller IP | Synopsys
Intel and Synopsys: Industry's First M-PCIe IP Interoperability Demonstration | Synopsys
DesignWare® IP for PCI Express® 4.0 Demonstration | Synopsys
DesignWare PHY & Controller IP for PCI Express 3.0 | Synopsys
Industry’s First PCIe 4.0 PHY Interoperability | Synopsys
Rapid PCIe 3.0 Root Complex IP Prototyping & Integration with DesignWare IP Prototyping Kits
Synopsys DesignWare IP for PCI Express 2.0 Complete Solution Demo | Synopsys
Synopsys Demonstrates the Industry's First Silicon-Proven MIPI M-PHY | Synopsys
Speed PCIe 3.0 Endpoint IP Prototyping & Integration with DesignWare IP Prototyping Kits | Synopsys
PCI Express 4.0 Interoperability Between Synopsys and Teledyne LeCroy -- Synopsys
DesignWare PHY IP for PCI Express at 16Gb/s | Synopsys
Synopsys PCI Express 4.0 IP & 16 Gbps PHY at IDF 2014 | Synopsys
